No surprise that I’m not a fan of AI and LLMs for chip design, but I thought the review of high-level synthesis to be interesting. They mention hardware acceleration in FPGAs, which was something I was super enamored with when learning the basics, but never really got into.
Originally sourced the link from HN
Yeah, I have to agree. I’m an older (64) EE, and have generally been underwhelmed by HLS - at least prior to Vitis. I worked alongside with engineers who designed the digital logic inside of FPGAs, since I specialized in analog design (back then, most FPGAs didn’t contain analog functional blocks).
But FPGAs always appealed to me, and I have done some FPGA designs just for fun. I would love to do more, since what enamors me about electronics is learning new stuff, but my “back burners” are all filled with projects in dire need of completion!