Great article by @momo explaining how he made (and you could make - he shared the source) a TDC from a PIC
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Neat read, thanks for posting! @momo in the coarse time section - do you mean that you used timer2, not subject to the clocking/4 issue, in gated mode? Iām confused why gated mode solves any resolution problems with timer1 as written.
Thanks for asking; I will add a note. The gated mode is not synced with Fosc/4; but the whole capture/compare is gated to Fosc/4.
You all might be interested in my other project, adding a 16-bit delta-sigma DAC with the CLB.
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