Mains Transformer Test Circuit (Elektor 509) Deconstruction


I mostly work with Embedded systems, and as part of my goals for 2022 I wanted to expand my knowledge, and so am pulling apart others circuits and designs to see what I can learn.

In issue 509 of Elektor there is a circuit (reasonably simple I think) for testing and measuring mains transformers. I have been pulling it apart over the vacation to gain a better understanding, but still have some questions for those who know more than I.

(I hope I am not causing issues by posting some images)

In the below image I see three grounds
AC Ground: image
DC Ground: image from the 3v3 rectifier
PC Ground: image from CON1 (a USB RS232 converter. also supplying 5v)

My question here is with regards to the optocouplers specifically the optocouplers used for RX, TX, ISP and Reset

as you can see CON1 sets the “triangle ground” (though it has the solid-bar ground as well internally?) this to me sets the power domains - the STM32 uses the same ground as the 3V3 regulator, so that makes sense. The optocouplers obviously should have different grounds depending on which domain is on each side; It would appear though that IC5 (the optocoupler on the TX line from CON1) has the grounds incorrectly specified? The LED side coming from CON1 should have the “triangle ground”? I think the ISP optocoupler (IC6) also has this issue? (or maybe this is a non-issue?)

(I will definitely have more questions on the AC side soon!)


It seems that you are right, looks wrong

Cheers! These optocouplers are for galvanic isolation of the PC - what do you reckon the impact is in reality?

I’m actually also asking myself why they bothered with an optocoupler on the reset line - its purely 3v3 from the regulator, seems overkill?

Everything referenced to the “flat bar” ground (e.g. the MCU reset) is riding on mains potential. The reset signal is coming from +5V from CON1, which is referenced to “triangle ground”, i.e. your PC or something. Isolation there is absolutely essential. Be very, very careful with assumptions about what “seems overkill” if you don’t have a really solid grasp of everything going on here.

You might even want to redraw it so that the power domains are more clearly delineated, it’s not a very well-drawn schematic.

Hi Julia, thanks! This schematic came straight from Elektor - I am just pulling it apart trying to understand it :slight_smile: but I tend to agree it’s not a well drawn schematic, I may reach out to the authors for clarification.

Being a mains potential system I have the exact same thoughts as you! If it’s there it’s probably for a reason, best to understand why before making assumptions.

I have broken this design down into blocks and am working through each, taking the time to understand each, reading and researching and asking questions - my specific aim is to start pulling apart other’s designs in order to expand my knowledge and skills, and had figured something like elektor would be a good place to find good examples.

As mentioned above I will reach out to the authors and see what I can learn and I’ll follow up here.

have mailed Elektor now, will be interesting to hear what they say! an additional question I asked was why they implemented the reset logic in this way - STM32L reset is /RST, I wonder why they didn’t u pull the Reset line low to 3V3 Ground and skip the entire 5V circuit?

the datasheet for the STM32L has this, with the internal PullUp they could skip R9 completely as well as optocoupler IC7…

I think the RGB LED should also either be common anode or connected to GND.

My guess with the NRST is that it is being used as an enable pin so that the STM is only running when CON1 is powered.

@Graeme the RGB LED is a topic for another day - haven’t really considered it properly yet, if someone has more experience in driving LEDs with an active low then please feel free to chime in! It’s not something that I see often thats for sure!

regarding the NRST, I can see where you’re coming from, but NRST is actually pulled high via R9 to 3V3, not 5V, and the 3V3 is powered from the mains (re: @JuliaTruchsess comment above, this seems to override the isolation the optocoupler on the reset switch provides?)

Hmmm… You’re right about the NRST. So the only reason can be that S1 needs to be at 5V, so is it physically located at the device connected to Con1? The plot thickens…

Graeme although I have not seen a completed board I do have the board files - top side

It is physically close to the connector, but looking at the board layout there doesn’t appear to be a need for it to be so.

S1 could be a little tact switch. You don’t want line voltage on that for safety reasons, hence the isolation.

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Julia, i guess this could occur in a fault situation in the 6v rectifier and 3v3 regulator? In which case I understand the use of 5v for the switch instead of 3v3 - however as RST is active low, a simple tact switch pulling the line to ground would suffice (as per the datasheet) - the optocoupler is still not required?

In continuing to read on these questions, I found an application note on ground potential differences and it had the following diagram and text

“In most SMPS applications, the DC ground (0V) of the SMPS output connects to the local PE either via an internal connection to the SMPS chassis or through an external wire. With each bus node ground reflecting its local PE potential, the earth potential differences of the mains are thus projected onto the data link as ground potential differences”

Maybe it’s late for me, but that sounds like gibberish

Normally the PE is not connected directly to GNDISO, since then it’s a PELV system, and then suddenly there are all kinds of rules when connecting to other equipment (25A bond wire test etc)

Thanks mate - since this last post was off topic for the main thread - I pinged you a message