Hello, I’m new here
I’m trying to make a p-n junction capacitance measurement device according to PN Junction Basics and Examples.
So far I know about diode junction capacitance is in different bias conditions(forward/reverse) the depletion region width varies and the diode shows transition capacitance during reverse bias and diffusion capacitance during forward bias.
When a sine wave is applied to a capacitor there is a phase shift between voltage and current, current always leads the voltage by 90degree.
My question is how to measure the junction capacitance of a p-n junction diode using sine wave?
There are a bunch of techniques. The simplest for me conceptually is a capacitive divider. Excite with an AC signal and the tap signal level is proportional to the ratio of the capacitance to total capacitance. If you apply a DC bias to the junction you need to do it through appropriate isolation (like an inductor, with big enough reactance to not be significant in the measurement) or consider the impedance of the bias network in the resulting calculations. This is also true of all other stray and parasitic components of course.
Or you can use an RC network. Same considerations apply.
There are a bunch of other approaches with various accuracy and operational advantages that depend on your application and constraints.
Someone told me…because of the voltage dependent capacitance the AC amplitude needs to be relatively small. In the forward direction it’s more like 10 mV. The forward direction is more difficult anyway, as there is a DC current superimposed. So the phase shift will not be 90 degree. This is why using an oscillator an measuring the frequency does not work well in that range. So it’s more like the basic setup of apply an DC+AC voltage and measure the current. To separate the current in the capacitive and conductive (in phase) part one needs to use some kind of pase sensitive analysis. This could be analog (e.g. using synchronous rectification) or digital by analyzing the digitized signal in software.
This is true; junction capacitance is best measured with a very small sinusoidal excitation to minimize the asymmetric effects due to the variation of depletion width with respect to bias voltage. An AC signal with magnitude of 10mV (peak, peak-peak, or even RMS) is a good test level, and can be superimposed on a DC level with ease. Either R-C of C-C divider method is also easy to implement, though “coulomb counting” and other approaches are also quite feasible.
