Hi Team,
I’m Darshan Hiranandani, I’m working on a project that involves measuring the capacitance of a p-n junction. Could anyone provide suggestions or best practices for accurately determining this capacitance?
Regards
Darshan Hiranandani
Hi Team,
I’m Darshan Hiranandani, I’m working on a project that involves measuring the capacitance of a p-n junction. Could anyone provide suggestions or best practices for accurately determining this capacitance?
Regards
Darshan Hiranandani
Are you interested in determining this for junctions in forward bias or reverse bias?
Hey!
To accurately determine the capacitance of a p-n junction, follow these steps:
By following these steps, you can accurately determine the capacitance of your p-n junction.
@reesewrenley gives excellent advice. An LCR meter (or bridge) is a great tool to use, but be aware of their limitations as well as the nature of p-n junctions.
First of all, it’s very important to minimize the effects of parasitic capacitance, resistance, and inductance of the test leads and/or the junction’s “environment”. Special test figures are available for most discrete components, but whatever the conditions it’s important to fully calibrate the test equipment. If the phase angle is more than a few degrees off from -90° it’s a good idea to try to find the resistance responsible for the measures error.
Some LCR meters may give inaccurate readings in the presence of DC, so if your meter is affected it may be a good idea to use a DC-blocking capacitor. This capacitor will appear in series with the junction’s capacitance, so calculation will be necessary. Of course, it’s imperative that any additional capacitors used be “well-behaved” at the frequencies and voltages they are subjected to.
Also, since a p-n junction’s capacitance depends on voltage, it’s necessary to minimize the test signal amplitude swing. ESR meters effectively calculate an average capacitance over the total voltage swing, and since capacitance is not a linear function of voltage the error induced by the voltage swing is greater with higher test signal amplitudes.
Finally, the effect of test frequency on the junction capacitance of small-signal diodes is usually much less of a problem than the offset created by lead inductance.