Escaping the nRF52 pads on a 3.5 mil PCB process

Originally published at: https://contextualelectronics.com/topic/escaping-the-nrf52-pads-on-the-jlc-3-5-mil-process/

In this video, Chris modifies the aQFN footprint to use a board house with 3.5 mil space/trace constraints. After the footprint is modified, he starts connecting up the power elements for the nRF52, and also starts looking at the connections for the daughtercard connector. Links we discussed in this video: TinyFPGA using “pill” shaped pads…