Question about setup and hold times on iCE40 FPGA

That’s a great post! It probably would have saved me some gray hair.

I do remember being really confused as to why the Lattice reference boards did not seem to follow their own recommendations! On the upside, this part has been very reliable in the Joulescope JS110 using SPI->RAM and the PLL.

For what it’s worth, I use the MIC5365-1.2YC5 LDO for VCC and VCC PLL. I use the MIC5365-3.3YC5 LDO for all the VCCIO voltages and VPP_2V5 (and yes, that makes me twitch).

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