I’ve frequently been using USB Type C connectors in my designs, but just for USB 2.0 or even just charging. For debug purposes, I’ve always wondered if I could leverage the extra pins (CC, SBU) for other protocols like a UART or SWD, without exposing any other headers. The question is, what would be the most reasonable way to be compatible with whatever is connected on the UFP?
I think the obvious answer is to implement some buffers/switches for those debug signals, and come up with some handshaking scheme to enable them (when connected to your custom test hardware).
One way could be to purposefully over-voltage the VBUS terminal (while being tolerable to it), enabling the debug signal buffers when connected to custom test hardware).
Has anyone done this, or run across a method to implement this?
In USB-C the two CC pins define alternate modes. It’s fairly easy as the detection is just based on the voltage on those pins, so it doesn’t need anything very fancy. This is how things like “USB-C to 3.5mm jack” can be done easily.
The only “legal” signals you could use alongside normal USB would be the two SBU pins normally. This is what Chrome does for example with the debug - it routes a second USB port over the SBU pins, but you could route anything else you want too during regular usage. But there are other non-regular modes too.
See https://en.wikipedia.org/wiki/USB-C#USB-C_receptacle_pin_usage_in_different_modes for an example of other settings. You are actually 100% allowed to have a special test mode which uses all the I/O pins as “other stuff”. If you need a lot of spare I/O pins you’ll need to either do orientation detection or just have your debug cable only valid plugged in one way, otherwise the default is to just ‘mirror’ the connector pins such you can plug your debug cable in either way.
Interesting. I overlooked the supported debug mode. Looks like it’s expected to have CC1 & CC2 pulled down with Rd to enable debug mode. The target just needs to perform a voltage comparison to check CC1 & CC2 and choose to enable the analog switch exposing JTAG, UART, etc.
Has anyone here actually implemented this? I find a lot of the spec information, but little to no implementations.
Any ideas how to make this a bit more “obfuscated”?
Do you mean for security? I think entering debug mode “should” be via the standard methods only.
From there you might have some challenge/response on the debug mode lines for example, which could use your buffers to attach them. It’s some extra hardware of course so I’m never sure where it’s really worth it…